AMD Strix Point APU with 12 Zen 5 cores achieves impressive performance

Private prototype samples of the AMD Strix Point APU chip based on 12 cores of the new generation with Zen 5 architecture and the ability to execute 24 instruction sequences simultaneously with the assistance of 24 MB of L3 cache and their Geekbench results have appeared in public.

An engineering sample of the prototype processor has been spotted in the Geekbench database and has a specific OPN ID of “100-000000994-14_N”. This identification number indicates that it is an AMD Strix Point APU chip as it has already appeared several times, and it is a chip model with a TDP value of 28 W designed to work on the FP8 platform intended for portable laptops.

The CPU was run on a Xen virtual machine and it should be noted that due to the fact that this is a test prototype chip and the nature of the Geekbench database, most of the details are either missing or not highlighted correctly. The chip is correctly identified as part of the “AuthenticAMD Family 26 Model 32 Stepping 0”.

AMD Strix Point “Ryzen” APU – 12 cores at 1.4 GHz:

For starters, the AMD Strix Point Ryzen 9 APU has a total of 12 cores based on the Zen 5 architecture and executes 24 “threads” simultaneously. This is the fastest configuration we’ll see in a Strix Point configuration. It is stated that the chip has 16 MB of L3 cache memory and 1 MB of L2 cache memory, but we know that there is a version that combines Zen 5 and Zen 5C, i.e. fast and energy-efficient cores, which means that only the model with the classic, fast Zen 5 is listed. cores. According to earlier reports, this chip should have a total of 24 MB of L3 cache memory.

AMD Strix Point demonstrates impressive performance at a low clock speed

As for L2 cache, it should be the same for all cores, so 12MB of L2 means that an individual core uses 1MB of fast memory to cache data. Moreover, the amount of L1 cache for instructions is present in a capacity of 32 KB, while the L1 cache for data is present with 48 KB. The data cache increased by 50% compared to the Zen 4 version, while the instruction cache remained unchanged.

The AMD Strix Point “Ryzen 9” APU was announced in the preliminary version with a core clock of 2 GHz, but database records show that the chip in operation reached a clock speed of 1.4 GHz, which in no way reflects the frequency of the final model. These are the clocks of the prototype ES sample, and we should expect the chip that will go on sale as the final version to reach 5 GHz or more. With such low preliminary frequencies of Zen 5 silicon, the chip achieved 1217 points in “single-core” and a very good 8016 points in the test that used several cores at the same time (multicore).

The second leaked test was done at 2 GHz and shows even better performance than the previous result. The APU was tested on the Birman Plus-STX reference platform. Birman is a reference platform for evaluating the FP8 platform previously used to test Phoenix & Hawk Point APU processors.

For the sake of comparison, the AMD Ryzen 9 8845HS with 8 cores of the Zen 4 class currently scores around 12000 points and that chip works at clocks up to 5.2 GHz. So 12 cores of the newer Zen 5 class running at similar speeds should bring huge improvements in “mulcore” mode, and we can also expect big gains in single core performance.

AMD Zen 5 is a completely new CPU core architecture and should have nice IPC performance gains compared to the existing Zen 4 CPUs. In addition, AMD’s Strix Point APU chips are expected to be launched later this year, with the first versions appearing for the laptop mobile version of the computer, followed by premium models based on chiplet topology that will offer a larger number of CPUs and GPUs. core.

More information about AMD Strix Point APU chips is expected at the upcoming Computex 2024 trade show held in Taiwan, reports wccftech.